/*
 * Copyright (c) 2019 Tang Haifeng <pengren.mcu@qq.com>
 *
 * Loongson3 Clock Register Definitions.
 *
 * This program is free software; you can redistribute	it and/or modify it
 * under  the terms of	the GNU General	 Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#ifndef __ASM_MACH_LOONGSON3_REGS_CLK_H
#define __ASM_MACH_LOONGSON3_REGS_CLK_H

#define LOONGSON_CONF_REG(x) \
		((void __iomem *)CKSEG1ADDR(LOONGSON_REG_BASE + (x)))

#define NODE_L2DIV_OUT_SHIFT		0
#define NODE_L2DIV_LOOPC_SHIFT	54
#define NODE_L2DIV_REF_SHIFT		48
#define NODE_L1DIV_OUT_SHIFT		42
#define NODE_L1DIV_LOOPC_SHIFT	32
#define NODE_L1DIV_REF_SHIFT		26

#define NODE_L2DIV_OUT_WIDTH			6
#define NODE_L2DIV_LOOPC_WIDTH		10
#define NODE_L2DIV_REF_WIDTH			6
#define NODE_L1DIV_OUT_WIDTH			6
#define NODE_L1DIV_LOOPC_WIDTH		10
#define NODE_L1DIV_REF_WIDTH			6

#define NODE_L2DIV_OUT_MARK			0x3f
#define NODE_L2DIV_LOOPC_MARK			0x3ff
#define NODE_L2DIV_REF_MARK			0x3f
#define NODE_L1DIV_OUT_MARK			0x3f
#define NODE_L1DIV_LOOPC_MARK			0x3ff
#define NODE_L1DIV_REF_MARK			0x3f

#define DDR_L1DIV_OUT_SHIFT		24
#define DDR_L1DIV_LOOPC_SHIFT		14
#define DDR_L1DIV_REF_SHIFT		8

#define DDR_L1DIV_OUT_WIDTH		6
#define DDR_L1DIV_LOOPC_WIDTH		10
#define DDR_L1DIV_REF_WIDTH		6

#define DDR_L1DIV_OUT_MARK			0x3f
#define DDR_L1DIV_LOOPC_MARK		0x3ff
#define DDR_L1DIV_REF_MARK			0x3f


#endif /* __ASM_MACH_LOONGSON3_REGS_CLK_H */
